1. Field of the Invention
The present invention relates to a semiconductor package having a light, thin, simple and compact structure, and more particularly to a semiconductor package having a light, thin, simple and compact structure in which outer leads extending outside a resin encapsulate are supported on a package body, thereby enabling the outer leads to have a minimum length while minimizing the volume of the resin encapsulate to maximize the mounting density of the semiconductor package on a main board and to achieve an improvement in the heat discharge efficiency.
2. Description of the Prior Art
Generally, semiconductor packages are known as electronic devices having an encapsulate for encapsulating a semiconductor chip, such as a single device formed with a variety of electronic circuits and lines, an integrated circuit or a hybrid circuit, while having signal input/output terminals connected to a main board in order to protect the semiconductor chip from harmful environments, such as dust, moisture, electrical loads and mechanical impact, while optimizing and maximizing the performance of the semiconductor chip.
Semiconductor packaging techniques have been developed along with developments of semiconductor chips. Hermetic packaging techniques using ceramic or cans made of a metal material have been mainly used in the early stages of development. However, such hermetic packaging techniques have a limitation in satisfying the super-high performance tendency of semiconductor chips and a demand for high productivity resulting from an abrupt increase in a demand for semiconductor chips. To this end, a plastic packaging technique has been mainly used. In accordance with the plastic packaging technique, a lead frame is used. An epoxy molding compound is also used to encapsulate semiconductor chips.
The lead frame is a member not only serving as a lead for electrically connecting input/output pads of a semiconductor chip to an electrical circuit formed on a main board, but also serving as a frame for fixing an associated semiconductor package to the main board. The epoxy molding compound, in particular, thermosetting epoxy resin, is mainly used as an encapsulate material for encapsulating semiconductor chips because it is inexpensive while exhibiting a high productivity even though it exhibits inferior thermal stability and inferior reliability as compared to ceramic.
FIG. 10A is a plan view illustrating a general lead frame having a conventional structure whereas FIG. 10B is a partially-broken perspective view illustrating a quad flat package (QFP) type semiconductor package fabricated using the lead frame of FIG. 10A. In addition to such a QFP semiconductor package, a variety of packages are known. For example, a dual inline package (DIP) and a single inline package (SIP) are known. All of these packages are similar in their basic structures in that they have leads outwardly protruded from outer surfaces thereof, respectively. The above-mentioned packages are distinguished from one another by their structures respectively having leads protruded from four side package surfaces, leads protruded from opposite two side package surfaces and leads protruded from only one side package surface. Accordingly, the following description will be described only in conjunction with QFP type semiconductor packages.
The lead frame denoted by the reference numeral 100' in FIG. 10A includes a semiconductor chip mounting plate 140' for mounting a semiconductor chip (not shown) thereon, a plurality of tie bars 110' for supporting the semiconductor chip mounting plate 104', and a plurality of inner leads 130' and a plurality of outer leads 120' provided around the semiconductor chip mounting plate 140'.
FIG. 10B illustrates a semiconductor package 200' formed using a lead frame having the same structure as the abovementioned conventional lead frame 100'. As shown in FIG. 10B, the semiconductor package 200' includes a semiconductor chip 210' laminated with a variety of desired electrical or electronic circuits and lines and formed at the upper surface thereof with a plurality of input/output pads 240'. The semiconductor chip 210 is mounted on a semiconductor chip mounting plate 140', which is a constituting element of the lead frame, by means of an adhesive layer. The semiconductor package 200' also includes tie bars 110' for supporting the semiconductor chip mounting plate 140', and a plurality of inner leads 130' electrically connected to the input/output pads 240' of the semiconductor chip 210' as input/output terminals by means of conductive wires 230'. Each inner lead 130' is provided at its tip portion with a finger plated with silver to achieve a good wire bonding thereof. The semiconductor package 200' further includes a resin encapsulate 220' molded to encapsulate the semiconductor chip 210', conductive wires 230' and inner leads 130', and a plurality of outer leads 120' formed integrally with the inner leads 130' while extending outwardly around the four side surfaces of the resin encapsulate 220'. The outer leads 120' serve as external connecting terminals (pins) of the package. A thermally conductive plate 250' may be provided on the lower surface of the semiconductor chip mounting plate 140' in order to easily discharge heat generated at the semiconductor chip 210' from the package.
Referring to FIG. 10A, dam bars 150' are shown which are cut in accordance with a trimming process after the molding of the resin encapsulate 220'. In order to improve the bonding force required to mount the semiconductor package 200' to a main board (not shown), the outer leads 120' of the semiconductor package 200' are coated with lead/tin (Pb/Sn) using a solder plating process. The plated outer leads 120' are also bent to have a desired shape, using a forming process.
In the conventional semiconductor package 200' having the above-mentioned structure, the outer leads 120', which are formed by cutting the dam bars 150' using the trimming process, extend outwardly from the four side surfaces of the resin encapsulate 220' at a middle position between the upper and lower surfaces of the resin encapsulate 220'. For this reason, each outer lead 120' should be bent at its outer end thereof using the forming process to have a desired shape so that the outer end of the outer lead 120' is flush with the upper or lower surface of the semiconductor package 200' for its electrical connection to a main board (not shown). To this end, it is necessary for the outer leads 120' to have a relatively large length. As a result, the outer leads 120' have a structure considerably protruded from the resin encapsulate 220'. Where the semiconductor package 200' having such a structure is mounted on a main board, a reduction in the mounting density occurs. Furthermore, a reduction in the design margin for electrical patterns formed on the main board occurs.
In the above-mentioned semiconductor package, the resin encapsulate 220' adapted to encapsulate the semiconductor chip and peripheral elements around the semiconductor chip has a considerably large volume as compared to the semiconductor chip 210'. As a result, there is a degradation in the heat discharge efficiency.
The semiconductor package 200' also has a limitation in increasing the number of its outer leads 120' serving as external connecting terminals because the outer leads 120' are protruded from only the side surfaces of the package 200'. As a result, there is a limitation in designing circuits and lines of the semiconductor chip.
Consequently, conventional semiconductor packages have a problem in that they can not satisfy two conflicting requirements for portable telephones, notebook computers and pagers, namely, the requirement to provide a high performance and high integration of semiconductor chips and the requirement to provide a light, thin, simple and compact package structure.